Impact of traffic (packet rate) on CPU - without CAR


Goal: study of impact of traffic on the CPU utilization at the ingress interface (FastEthernet) and output interface (ATM)
Equipment:

Test Description

  1. Topology
    The two FastEthernet (duplex) intrfaces of the SmartBits are connected back-to-back to the FastEthernet interfaces of the C7500 and C7200
    The ATM connection between the routers is UBR (155 Mbps) and not shared with other sources of traffic
  2. Parameters:

Comments:



Fig.1: CPU utilization of the FastEthernet interface and ATM interface for different packet rates (without CAR)